數位系統設計 Design of Digital System
- 大學部一年級必修課程。
- 近五年開課情形:1081、1091、1101。
- 110學年度第一學期課程大綱。(本課程所錄製之所有影片可上YouTube搜尋"中山電機系數位系統設計")
- Textbook
- “Digital design”, M. Mano and M. Ciletti, Pearson Prentice Hall 2018
(6th Global Edition)
- Topics include
- Digital system and binary numbers
- 1.2-1.4 Representation and conversion of numbers
- 1.5 Complements
- 1.6 Signed binary numbers
- 1.7-1.9 Binary number/coding/storage/logic
- Boolean algebra and logic gates
- 2.1-2.3 Postulates of Boolean algebra
- 2.4 Basic properties of Boolean algebra
- 2.5 Boolean functions
- 2.6 Canonical and standard forms
- 2.7-2.8 Other logic operations
- Gate-level minimization
- 3.1-3.3 Karnauph map method
- 3.4 Product-of-Sums Simplification
- 3.5 Don't care condition
- 3.6 NAND and NOR implementation
- 3.7 Other two-level implementations
- 3.8 Exclusive-OR function
- Combinational logic
- 4.1-4.4 Analysis and design of combinational logic
- 4.5 Binary adder/subtractor
- 4.6 Decimal adder
- 4.7 Binary multiplier
- 4.8 Magnitude comparator
- 4.9-4.10 Decoder/Encoder
- 4.11 Multiplexer
- Synchronous sequential logic
- 5.1-5.2 Introduction to sequential logic
- 5.3 Latches
- 5.4 Flip-flops
- 5.5 Analysis of sequential circuits
- 5.6 State reduction and assignment
- 5.7 Design of sequential circuits
- Registers and counters
- 6.1-6.2 Registers
- 6.3 Ripple counter
- 6.4-6.5 Synchronous counter, ring counter
- Memory and programmable logic
- 7.1 Introduction to RAM and ROM
- 7.2-7.3 Random-access memory
- 7.5 Read-only memory
- 7.6 Programmable logic array
- 7.7 Programmable array logic
- Grading
- Homework and Quiz 35%
- Midterm 35%
- Final 35%
- Released News for 110學年第1學期
- 本學期因應教務處實體上課限制(80人以下、每人至少2.25平方公尺),該時段本系並無任何空間供實體課程進行,故將改採為全線上進行。詳細方式將於第一次上課(9/29 PM 1:10)說明,請選課同學屆時由使用Google Meet連結上線。
- 本學期將採用Google Classroom作為公告課程進度與繳交作業的主要平台,請選課同學務必加入(課程代碼:cslhnvr)。
- 由於疫情日漸趨緩,且本班人數未超過指揮中心之80人限制,本課程將於10/27起恢復實體上課。
- Midterm: 12/1 Wed PM 1:10 @EC2007(單號),EC2019(雙號)。
- Final: 1/12 Wed PM 1:10 @EC2007(雙號),EC2019(單號)。